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preliminary em microelectronic-marin sa P4022 1 multi frequency contactless identification device anti-collision compatible with btg's supertag category protocols features n implements all btg anti-collision protocols: fast switch-off and slow-down, and free-running n can be used to implement low frequency inductive coupled transponders, high frequency rf coupled transponders or bi- frequency transponders n factory programmed 64 bit id number n eight data rate options: 0.5 kbit/s to 64 kbit/s n eight maximum random delay options n two data encoding options n any field frequency: typically 100 khz, 13.5 mhz inductive and 100 mhz to 2.54 ghz rf n data transmission done by amplitude modulation n 110 pf on-chip resonant capacitor n on-chip rectifier and voltage limiter n on-chip oscillator n low voltage operation - down to 1 v n low power consumption n -40 to +85 o c temperature range description the P4022 chip implements patented anti- collision protocols for both high frequency and low frequency applications. it is even possible to identify transponders with identical codes, thereby making it possible to count identical items. the chip is typically used in ?assive? transponder applications, i.e. it does not require a battery power source. instead, it is powered up by an electromagnetic energy field or beam transmitted by the reader, which is received and rectified to generate a supply voltage for the chip. a pre- programmed code is transmitted to the reader by varying the amount of energy that is reflected back to the reader. this is done by modulating an antenna or coil, thereby effectively varying the load seen by the reader. low frequency applications are those applications that can make use of the on-chip full wave rectifier bridge to rectify the incident energy. these are typically applications that use inductive coupling to transmit energy to the chip. the carrier frequency is typically less than 500 khz. the design of the on-chip rectifier and resonance capacitor is optimized for frequencies in the order of 125 khz. low frequency transponders can be implemented using just a P4022 chip and an external coil that resonates with the on-chip tuning capacitor at the required carrier frequency. an external power storage capacitor can be added to improve reading range. low frequency inductive coupled applications typically have lower reading distances and lower data rates (4 kbit/s or 8 kbit/s @ 125 khz). reading rates of 30 transponders per second at 4 kbit/s can be attained. high frequency applications are those applications that cannot make use of the on-chip rectifier to rectify the incident energy. instead, external microwave schottky diodes are required to rectify the carrier wave. these are typically applications that use electromagnetic rf coupling to transmit energy to the chip using carrier frequencies greater than 100 mhz. high frequency transponders can be implemented using a P4022 chip, one to three microwave diodes and a printed antenna. an external power storage capacitor can be added to improve reading range. high frequency rf coupled applications typically have higher reading distances (> 4 m) and higher data rates (64 kbit/s). reading rates of 480 transponders per second at 64 kbit/s can be attained. it is also possible to implement transponders that work in both high and low frequency applications (bi-frequency transponders). applications n access control n asset control n licensing n auto-tolling n animal tagging n sports event timing n electronic keys
preliminary em microelectronic-marin sa P4022 2 typical operating configurations P4022 vdd coil1 coil2 gap vss cpx m l figure 1: low frequency inductive transponder implementation. P4022 vdd m gap vss cpx c+ d1 d2* l figure 2: medium frequency (13.56 mhz) inductive transponder implementation. d2 is optional. l: coil antenna (typical value 1.2 ?). c+: tuning capacitor (typical value 110 pf) P4022 vdd m coil1 coil2 gap vss cpx d 3 d 1 d 2 * figure 3: high frequency rf transponder implementation. d2 is optional. pin assignment 6 7 8 2 3 4 5 9 1 P4022 figure 4: pin assignment absolute maximum ratings parameter symbol conditions maximum ac peak current induced on coil1 and coil2 i coil ?50 ma maximum dc voltage induced between m and v ss 1) v m 4.5 v maximum dc current supplied into m 1) i m 50 ma power supply v dd - v ss -0.3 to 3.5 v max. voltage other pads v max v dd + 0.3 v min. voltage other pads v max v ss - 0.3 v storage temperature t store -55 to +125 o c electrostatic discharge maximum to mil-std-883c method 3015 v esd 1000 v 1) whatever is reached first table 1 stresses above these listed maximum ratings may cause permanent damage to the device. exposure beyond specified operating conditions may affect device reliability or cause malfunction.
preliminary em microelectronic-marin sa P4022 3 handling procedures this device has built-in protection against high static voltages or electric fields; however, due to the unique properties of this device, anti-static precautions should be taken as for any other cmos component. unless otherwise specified, proper operation can only occur when all the terminal voltages are kept within the supply voltage range. operating conditions parameter symbol min typ max units operating temperature t a -40 +85 o c maximum coil current i coil 50 ma ac voltage on coil* v coil 8 v pp dc voltage on m* v m 3.5 v table 2 * the ac voltage on the coil and the dc voltage at pad m are limited by the on-chip shunt regulator. electrical characteristics v supply between 1.2 and 3.0 v, t a = 25 o c, unless otherwise specified. parameter symbol test conditions min typ max units supply voltage (vdd ?vss) v supply 1.2 3.5 v oscillator frequency f osc v supply between 1.2 and 3.0 v 110 128 140 khz power-on reset threshold v ponr v supply rising 0.7 1.2 1.6 v power-on reset threshold v ponf v supply falling 0.5 1.0 1.4 v power-on reset hysteresis 130 200 270 mv gap input time constant t gap 0.2 m s modulation transistor on resistance r on 40 w resonance capacitor cr 106. 7 110 113. 3 pf total current consumption from cp i tfree free-running mode, v supply = 1.2 v 2.6 m a total current consumption from cp i tfree free-running mode, v supply = 3 v 10 m a total current consumption from cp i tgap gap enabled, v supply = 1.2 v 14 m a total current consumption from cp i tgap gap enabled, v supply = 3 v 40 m a total current consumption from cp i tdead switched-off state, v supply = 1.2 v 15 m a total current consumption from cp i tdead switched-off state, v supply = 3 v 60 m a table 3
preliminary em microelectronic-marin sa P4022 4 current consumption the total typical current consumption from the storage capacitor cp in various modes is shown in table 4 below. the total current consumption in conjunction with the size of the power storage capacitance determines the maximum time that transistor q2 can be turned on and q1 turned off, before the supply voltage drops below 1 v, thereby resulting in the power-on reset block resetting the chip. this in turn determines the minimum data bit rate and maximum range. similarly the total storage capacitance and total current determine the maximum unpowered switched-off state time. the second column shows the current drawn in free-running mode. the third column shows the current drawn for the bi-directional protocols, which includes the current drawn by the gap input pull-up. the fourth column shows the total current drawn in switched-off state. in this mode both the gap input and the shunt regulator draws current from the storage capacitor. supply (v) current (free) ( m a) current (bi-directional) ( m a) current (swtiched- off state) ( m a) 1.0 1.8 2.2 2.8 1.2 2.6 3.6 4.6 1.5 3.8 6.3 8.3 2.0 6 13 16 3.0 11 31 51 table 4 table 5 below shows the theoretical storage capacitance required for various applications. for free-running applications, the capacitance required is determined by the data bit rate and encoding method. only the logic, pon and oscillator draw current in free-running applications. for the bi-directional protocols, the gap input pull-up also draws current during modulation. data bit rate (kbit/s) en- coding free- running (pf) bi-direc- tional (pf) counting ( m f) 4 man 2700 3600 20 4 glitch 670 900 20 64 man 170 240 20 64 glitch 40 80 20 table 5 for counting applications (switch-off btg- supertag) the required unpowered time in the switched-off state determines the size of the capacitor. in applications where the chip can be guaranteed to stay powered, the capacitor size is determined by the data bit rate . it should be noted that the on-chip capacitance is sufficient for free-running applications at 64 kbit/s, while inductive applications at 4 kbit/s require a few nanofarad externally. unpowered counting applications will require more than 20 m f to achieve 1 second unpowered time in the switched-off state.
preliminary em microelectronic-marin sa P4022 5 timing characteristics 1) all timings are derived from the on-chip oscillator, which can vary by 30%. 2) the minimum low frequency gap width for a single chip is 1 bit at its own clock frequency. the reader must however allow for the 30% spread in clock frequencies possible in a group of tags. therefore the minimum width of the gap in mute and wake-up signals must be 1.5 bits. high frequency gaps can be arbitrarily narrow (specified as minimum 50 ns). 3) the maximum gap width for a single chip is 6 bits at its own clock frequency. the reader must however allow for the 30% spread in clock frequencies possible in a group of tags. therefore the maximum width of the gap in mute and wake-up signals must be 5 bits. parameter symbol test conditions min typ max units high frequency gap width t hfgap 50 ns high frequency ack gap width t hfgap 6 bit high frequency mute and wake-up gap width t hfgap 5 bit low frequency ack gap width t lfgap 1.0 6 bit low frequency mute and wake-up gap width t lfgap 1.5 5 bit gap separation in wake-up signal 1.5 5 bit table 6 anti-collision protocol overview the protocols are a collection of simple but fast and reliable anti-collision protocols. they allow fast reading of large numbers of transponders simultaneously using a single reader. it is even possible to identify transponders with identical codes, thereby making it possible to count identical items. free-running protocol the basis of the btg-supertag series of protocols is that transponders transmit their own codes at random times to a reader. by just listening and recording unique codes when they are received, the reader can eventually detect every tag. the reader detects collisions by typically checking a crc. this basic protocol is known as the ?ree- running?protocol. it requires uniquely coded tags. its main advantage is that the reader design is simple, and the spectrum requirement is much less ?a very narrow band is required. bi-directional protocols allowing bi-directional communication between reader and transponders can speed up the basic free-running protocol. communication from the reader to transponders is achieved by turning the illuminating energy field off for short periods. the transponders detect these gaps in the energy transmission and interpret them as required. switch-off and slow-down modes reducing the effective population of transmitting transponders in the reader field can speed up the free-running protocol. one method to achieve this is by either switching transponders off or slowing them down once they have been detected. to achieve this, the reader sends an ack signal to a transponder after its code has been successfully received. the transponder then either switches off completely or reduces its repeat rate until it is powered down. this reduces the number of collisions between transponder transmissions, thereby reducing the time required to read a group of tags. the switch-off protocol? main advantage is that identical transponders can be counted. in the P4022 the ack signal is implemented as two consecutive gaps with the appropriate timing and received at a specific time after a code has been transmitted. fast mode a second method of speeding up the reading of tags, is to inhibit other transponders from transmitting while one transponder is transmitting. this is done by sending a mute signal to all the transponders when the start of a transmission is detected. the transponders stay muted long enough to allow the transmission of one code. this allows the transponder that has started transmitting to complete its transmission without any collisions. the other transponders continue
preliminary em microelectronic-marin sa P4022 6 with their own protocols automatically after a time out, or continue immediately upon detection of an ack signal indicating that the transmission which caused the mute has been completed. in the P4022 the mute signal is implemented as a single gap received while the transponder is not transmitting. protocol combinations the free-running and the two basic bi- directional protocols, switch-off and slow- down, can all be combined with the fast protocol to give six different protocols, i.e. normal free-running, normal slow-down, normal switch-off, fast free-running, slow- down, and fast switch-off. the following should be noted about the different protocols: 1) the switch-off protocols must be used for counting applications. 2) all the protocols except the switch-off protocols have built in redundancy because of the fact that they can transmit a code more than once. 3) normal free-running is the only uni- directional protocol. it has the lowest power spectrum requirement because the reader transmits a cw wave. 4) fast switch-off and fast slow-down are the fastest protocols, and should be used where speed is important, or where the data rate limits the reading rate. fast slow-down is slightly slower, but theoretically has a lower error rate. 5) for 125 khz inductive applications using a 4 kbit/s data rate, fast slow-down is probably the best overall protocol. 6) for rf applications using a 64 kbit/s data rate, normal free-running protocol is probably the best protocol. reader determined protocols if the reader does not send mute signals to transponders that were programmed for one of the fast protocols, the protocol merely reverts to the equivalent normal protocol. similarly, if the reader does not send ack signals to transponders that were programmed for slow-down or switch-off, the protocol reverts to a free- running protocol. in this manner, the reader can determine the protocol that is used. note, however, that unless a transponder was specifically programmed for the free-running protocol, its gap input must be pulled down. this happens automatically in low frequency inductive applications, where the gap input is pulled down by the internal gap detector diode. in rf applications, however, the gap input will have to be pulled down explicitly. this will consume extra current. protocol saturation as the number of transponders in a reader beam is increased, the number of collisions increase, and it takes longer to read all the tags. this process is not linear. to read twice as many transponders could take more than twice as long. this effect is called protocol saturation . the normal free-running protocol saturates the easiest of all the protocols, because it does not have any means of reducing the transmitting population. the fast protocols, on the other hand, are virtually immune against saturation, as they prevent collisions by muting all transponders except the transmitting one. one way of delaying the onset of saturation, is to reduce the initial repeat rate (not data rate) at which transponders transmit their codes. this is done by increasing the maximum random delay between transmissions. seven different settings are available from 16 bits to 64 kbits. a higher setting means it will take longer to read a small number of tags, but it will take a larger number of transponders to saturate the communication channel. table 7 below compares reading times at 4 kbit/s vs. the number of transponders in a group. in each case the repeat delay was optimised for a group of 30 transponders. time (s) no of transponders 3 10 30 100 300 free-running 3.1 5.8 10.8 49.3 - slow-down 0.86 1.8 5.8 89 - switch-off 0.79 1.5 3.4 34 - fast free-running 0.30 0.78 2.9 21 690 fast slow-down 0.27 0.55 1.4 6.2 33 fast switch-off 0.26 0.49 1.0 3.3 13 table 7
preliminary em microelectronic-marin sa P4022 7 reading rates table 8 below compares reading times at 4 kbit/s for the six protocols. the optimum repeat delay setting was chosen in each case. reading rate is linear with data bit rate. at a bit rate of 64 kbit/s, the reading rates are 16 times faster than at 4 kbit/s. time (s) data rate (kbit/s) 4 64 no of tags 5 30 5 30 free-running 0.39 10.8 0.022 0.58 slow-down 0.35 5.8 0.019 0.32 switch-off 0.29 3.4 0.017 0.19 fast free-running 0.18 2.9 0.010 0.15 fast slow-down 0.11 1.4 0.007 0.084 fast switch-off 0.085 1.0 0.007 0.060 table 8 optimum repeat delay settings table 9 lists the optimum repeat delay settings for each of the protocols vs. number of transponders in a group. protocol number of tags 3 10 30 100 free-running 1k 4k 16k 64k slow-down 1k 1k 4k 16k switch-off 1k 1k 4k 16k fast free-running 256 1k 1k 4k fast slow-down 256 256 1k 1k fast switch-off 256 256 1k 1k table 9 functional description block diagram shunt pon vdd vss gap n p c r tst vdd vdd cg rg dg d1 d3 d2 d4 osc cp q1 q2 cr m coil1 gap si xclk tmc vss vdd coil2 logic vss vss vss figure 4: P4022 block diagram
preliminary em microelectronic-marin sa P4022 8 resonance capacitor the resonance capacitor cr has a nominal value of 110 pf and is trimmed to ?3%. for resonance at 125 khz an external 14.7 mh coil is required. at 13.65 mhz the required coil inductance drops to 1.2 m h. rectifier bridge diodes d1-d4 form a full wave rectifier bridge. they have relatively large forward resistances (100 -200 w ). this is quite sufficient at 128 khz, where the output impedance of the tuned circuit is high, but at 13.5 mhz the diode resistance becomes significant and external diodes have to be used to bypass the internal ones. the diode resistance affects the rate at which the power capacitor cp can be charged. it also affects the modulation depth that can be achieved. shunt regulator the shunt regulator has two functions. it limits the voltage across the logic and in high frequency applications it limits the voltage across the external microwave schottky diodes, which typically have reverse breakdown voltages less than 5 v. the shunt regulator draws less than 500 na at 1 v. its maximum current shunt capability is 50 ma at 3.5 v. oscillator the on-chip rc oscillator has a centre frequency of 128 khz and a spread of 30% over the full temperature and supply range. power-on reset (pon) the reset signal keeps the logic in reset when the supply voltage is lower than the threshold voltage. this prevents incorrect operation and spurious transmissions when the supply voltage is too low for the oscillator and logic to work properly. it also ensures that transistor q2 is off and transistor q1 is on during power-up to ensure that the chip starts up. modulation transistor the n channel transistor q2 is used to modulate the transponder coil or antenna. when it is turned on it loads the antenna or coil, thereby changing the load seen by the reader antenna or coil, and effectively changing the amount of energy that is reflected to the reader. it has an on resistance of typically less than 40 w . the on resistance affects the depth of modulation, especially at higher carrier frequencies (> 10 mhz), where the coil or antenna impedance can be lower than 200 w . charge preservation transistor the p channel transistor q1 is turned off whenever the modulation transistor q2 is turned on to prevent q2 from discharging the power storage capacitor. this is done in a non- overlapping manner, i.e. q1 is first turned off before q2 is turned on, and q2 is turned off before q1 is turned on. gap detection poly-silicon diode dg is used to detect a gap in the illuminating field. it is a minimum sized diode with forward resistance in the order of 2 k w. the low pass filter shown diagrammatically as cg and rg actually consists of a pull-up transistor (approximately 100 k w) in conjunction with the parasitic capacitance of the gap input pad (approximately 2 pf). the effective time constant is in the order of 0.2 m s. through the diode the gap input will be pulled low during each negative going cycle of the carrier. when the carrier is switched off, the gap input will be pulled high by the pull-up transistor. at very high carrier frequencies (> 100 mhz) the carrier will be filtered out, so that the gap input will be low continuously when the carrier is present. when the carrier disappears, the gap input will go high with the time constant of the low pass filter. at very low frequencies the gap input will go high and low at each cycle of the carrier, and will stay high when the carrier disappears. to detect the gap, the logic must check for a high period longer than the maximum high period of the carrier. as the rise and fall times of the gap can be slow, a schmitt trigger is used to buffer the gap input. power storage capacitor a 94 pf power supply capacitor is included in the layout of the P4022. this is sufficient for 64 kbit/s applications, but 4 kbit/s applications will required an additional external storage capacitor.
preliminary em microelectronic-marin sa P4022 9 logic block depending on the state of the si input at power- up, the P4022 either enters a test mode (si = 1) or its normal operating mode (si = 0). the si pin is internally pulled down, so that it can be left open for normal operation. after the power-on reset has disappeared, the chip boots by reading the seed and ctl roms. the chip then enters its normal operating mode, which basically consists of clocking a 16 bit timer counter with the bit rate clock until it compares with the number in the random number generator. at this point a code is transmitted with the correct preamble at the correct data rate and encoded correctly. the random number generator is clocked to generate a new pseudo random number, and the 16 bit counter is reset to start a new delay. the width of the comparison between the 16 bit random number and the 16 bit delay count determines the maximum possible delay between transmissions (reading rate). any one of eight maximum delay settings can be pre-programmed. the basic free-running mode as described above can be modified by the reception of gap (mute and ack) signals, if these are enabled by the ctl bits. if an ack signal is received after transmission of a code, the chip either turns itself off completely or reduces the rate at which the delay counter is clocked, thereby slowing down the rate at which codes are transmitted. if a mute signal is received while the chip is not transmitting, the current operation of the chip is interrupted for 128 clock periods, after which it continues normally. reception of more mutes during the sleep state restarts the sleep state. the sleep state is also terminated by the reception of a wake-up signal (an ack signal to a chip which has just completed transmitting). t 1 clock data lf ack hf ack bit n t 1 ack timing figure 5: ack timing diagram gap detection algorithm the gap detection logic contains two main controllers, one for detecting the ack signal, and one for detecting the mute and wake-up signals. the wake-up signal is also called an asynchronous ack, as it is really an ack meant for another chip. it also contains a pre-processor for low frequency gap signals. refer to the timing diagrams in figure 5 and 6 for the following detailed description of the gap detection algorithms. ack the controller checks for a low 1.75 bit periods after the last bit of code has been transmitted. it then checks for a high 3 bits later, a low 3 bits later and finally a high a further 3 bits later. the reader should synchronise itself to the frequency of the received code, check the crc and then send two gaps so that the above pattern is matched. ideally to achieve the lowest error rate, the gaps should be as narrow as possible and situated 4.75 and 7.75 bits after the last bit of code. in practice allowance must be made for the fact that the on-chip oscillator can drift in the
preliminary em microelectronic-marin sa P4022 10 time between when the last code bit is transmitted and when the gaps are expected. one reason for the drift is that the oscillator is supply voltage dependent, and the supply voltage will typically be rising during this time, since the transponder will not be modulating its coil or antenna. the slope of the rising and falling edges of the gaps can also be adjusted to reduce reader power bandwidth. in the case of high frequency gaps the envelope is used directly. low frequency gaps have to be pre-processed. they are detected by checking for high periods lasting longer than one bit period. for this reason there is a set-up time of 1 bit. the minimum gap width is therefore 1 bit period (t 1 in the timing diagram). mute the mute signal is received asynchronously by the transponder. the controller checks for a high less than 7 bits wide after pre-processing (t 2 in the timing diagram). as in the case of the ack, low frequency mute gaps must be at least one bit wide, but high frequency gaps can be arbitrarily narrow. when transmitting a mute, the reader must take into account that there could be a spread of 30% in the clock frequencies of all the receiving transponders. the reader should therefor limit the width of a mute to be less than 5 bits of the nominal bit rate (t 4 in the timing diagram). a low frequency mute should also be wider than 1.5 bits of the nominal bit rate (t 3 in the timing diagram). the mute should be sent as early as possible after a code transmission has been detected, while still making sure that it is a code transmission and not just noise. the earlier the mute is sent, the more time the reader has to recover before the synch and code bits arrive, and the smaller the probability that another transponder has started a colliding transmission. figure 6: mute and wake-up timing diagrams
preliminary em microelectronic-marin sa P4022 11 wake-up an ack sent after correct receipt of a code is interpreted by the other transponders in the field as a wake-up. the ack arrives synchronously at the transponder that has just transmitted, but asynchronously at all the other transponders. if necessary, a wake-up can also be sent if the code is not received correctly, making sure that it will not be interpreted as an ack by the transmitting transponder. this could speed up the protocol, but runs the risk of turning transponders off by accident. to detect a wake-up, the chip checks for two gaps, less than 7 bits apart and each less than seven bits wide. as with the mute allowance must made for the 30% spread in clock frequencies. to be safely interpreted as a wake- up, the gaps should be sent less than 5 bits apart, and each should be less than 5 bits wide. this has an implication in the case of the high frequency ack, which could theoretically consist of two very narrow gaps 6 bits apart. in practice though, the gaps will be typically at least one bit wide, making the separation five bits. like the mute, the low frequency ack gaps should be at least 1.5 bits wide to serve as a reliable wake-up. it should be noted that failure to reliably recognise wake-ups is not critical. the protocol might be slowed down marginally, but will still work, as the chips time-out of the sleep mode automatically after 128 bits. data encoder the transmitted code always consists of an 11 bit preamble followed by the 64 code bits. the preamble consists of 8 start bits (zeroes), followed by a synch. the synch consists of a low for two bit periods followed by a one. the P4022 can be programmed for one of two data encoding methods. the first method is a variation on manchester ii, i.e. a one is represented by a high in the first half of a bit period, and a zero is represented by a low in the first half of a bit period. the second encoding method is called glitch encoding. a one is represented by a high in the first quarter of the bit period, while a zero is represented by a high in the third quarter of the bit period. in glitch encoding the longest modulation period is one quarter of a bit period, compared to the manchester encoding, where the longest modulation period is one full bit period. glitch encoding therefore requires a much smaller power storage capacitor. figure 7 : data encoding methods
preliminary em microelectronic-marin sa P4022 12 rom programming the P4022 contains three laser fuse rom blocks that are pre-programmed by the foundry. blowing a laser fuse writes a zero into the rom bit. code id rom this rom contains the 64 bit id code. unless otherwise specified, the foundry will automatically program a unique 48 bit id and 16 bit crc. in this case the most significant bit of the id is programmed into bit 0 of the rom, which will be transmitted first. seed rom the seed rom block contains the 16 bit control rom. the 16 bit seed for the on-chip pseudo- random number generator is pre-programmed by the foundry into this rom. this data is used internally and not transmitted. control rom the operational modes of the P4022 are pre- programmed into the control rom. it must be specified by the client as a 16 bit unsigned integer or two unsigned chars (bytes), as shown in table 11. the programmable options are listed in table 10. this data is used internally and not transmitted. control rom bit definition parameter value mode fast / normal mode 0 1 normal fast free-running 0 gap detection enabled 1 gap disabled (free-running) ack mode 0 slow-down 1 switch-off maximum 0 0 (continuous) initial random 1 16 bits delay 2 64 bits 3 256 bits 4 1 kbits 5 4 kbits 6 16 kbits 7 64 kbits data rate 0 64 kbit/s 1 32 kbit/s 2 16 kbit/s 3 8 kbit/s 4 4 kbit/s 5 2 kbit/s 6 1 kbit/s 7 0.5 kbit/s encoding 0 glitch encoding method 1 manchester encoding gap type 0 low frequency gap detection 1 high frequency gap detection table 10 control rom map 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 byte[1] byte[0] hf gap man- chester data rate random delay switch- off free- running fast table 11
preliminary em microelectronic-marin sa P4022 em microelectronic-marin sa cannot assume responsibility for use of any circuitry described other than circuitry entirely embodied in an em microelectronic-marin sa product em microelectronic-marin sa reserves the right to change the specifications without notice at any time. you are strongly urged to ensure that the information given has not been superseded by a more up to date version. ?1998 em microelectronic-marin sa, 02/98 rev. a/196 em microelectronic-marin sa , ch-1074 marin, tel. +41 32 755 51 11, fax. +41 32 755 54 03 13 package and ordering information pad description pad name function 1 coil2 coil terminal 2 2 v ss negative internal supply voltage 3 gap gap input 4 si serial test data input (pull down) 5 tmc test mode control (pull down) 6 xclk external test clock (pull down) 7 v dd positive internal supply voltage 8 m connection to external antenna 9 coil1 coil terminal 1 table 12 chip size 57 x 69 mil configuration examples application parameters typical practical parameters configuration control rom bits external capacitor inductive coupling, 125 khz carrier, batches < 50 tags, 1 second per batch warehousing, asset control, sports event timing, mining, personnel tracking fast slow-down, 8 kbits/s, glitch encoding, 4 kbit delay 0x00e9 600 pf inductive coupling, 125 khz carrier, batches < 5 tags 0.1 second per batch sports event timing, conveyer belt, personnel tracking, auto-tolling fast slow-dow, 8 kbit/s, glitch encoding, 256 bit delay 0x00d9 600 pf inductive coupling, 125 khz carrier, batches < 50 identical tags (counting), 1 second per batch guaranteed power warehousing fast switch-off, 8 kbit/s glitch encoding, 4 kbit delay 0x00ed 600 pf inductive coupling, 125 khz carrier, batches < 50 identical tags (counting), 1 second per batch, 1 second unpowered warehousing fast switch-off, 8 kbits/s, glitch encoding, 4 kbit delay 0x00ed 20 ? inductive coupling, 125 khz carrier, 1 tag at a time, 0.012 seconds per tag access control, conveyer belt free-running, 8 kbit/s, glitch encoding, 16 bit delay 0x00ca 500 pf rf coupling, 400-2540 mhz carrier, batch < 3 tags, 0.02 seconds per batch auto-tolling, sports event timing free-running, 64 kbit/s, glitch encoding, 1 kbit delay 0x0022 none rf coupling, 400-2540 mhz carrier, batch < 30 tags, 1 batch per second sports event timing, personnel tracking free-running, 64 kbit/s glitch encoding, 16 kbit delay 0x0032 none rf coupling, 400-2540 mhz carrier, batch < 200 tags 1 batch per second warehousing fast, slow-down, 64 kbit/s, glitch encoding, 4 kbit delay 0x0029 none

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